Distrbuted Processing and A Parallelising Algorithm for Matrix Arithmetics of Digital Signal Processings on VLIW Simulator 


Vol. 5,  No. 8, pp. 1985-1996, Aug.  1998
10.3745/KIPSTE.1998.5.8.1985


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  Abstract

A parallelising algorithm for partitioning and mapping methods of matrix/vector multiplication into linear processor array/VLIW simulator is presented in this paper. First, we discuss the mapping methods for input matrix or vector into the arbitrarily size of processor arrays. Then, we show partitioning the algorithms of the large size of computational problem into the size of the processor array. We execute the algorithm on VLIW simulator and show to effectiviness of algorithm. The result which we achived better parallelising performance on our VLIW simulator design than on linear processor array.

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  Cite this article

[IEEE Style]

S. J. Hee and J. M. Seog, "Distrbuted Processing and A Parallelising Algorithm for Matrix Arithmetics of Digital Signal Processings on VLIW Simulator," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 5, no. 8, pp. 1985-1996, 1998. DOI: 10.3745/KIPSTE.1998.5.8.1985.

[ACM Style]

Song Jin Hee and Jun Moon Seog. 1998. Distrbuted Processing and A Parallelising Algorithm for Matrix Arithmetics of Digital Signal Processings on VLIW Simulator. The Transactions of the Korea Information Processing Society (1994 ~ 2000), 5, 8, (1998), 1985-1996. DOI: 10.3745/KIPSTE.1998.5.8.1985.