Computer Graphics & Synthesizable Synchronous VHDL Code Generator Design and Implemetation from SpecCharts 


Vol. 7,  No. 11, pp. 3566-3575, Nov.  2000
10.3745/KIPSTE.2000.7.11.3566


PDF
  Abstract

We are using a methodology of virtual prototype(VP) which can reduce costs and developement time to the market. VP is composed of S/W component, H/W component, and interface component which links H/W to S/W. There are many methods of realizing H/W components, but we adopt a method which translates from system specification into hardware description in VHDL. In this paper, we present design and implementation of code generator from SpecCharts as system specification language to a VHDL code which can be synthesized and verified. The verification becomes feasible when the hardware satisfies synchronous semantics, which we call, Synchronous VHDL.

  Statistics
  Cite this article

[IEEE Style]

S. J. Yun, W. Y. Yoo, J. Y. Choi, J. I. Choi, S. Y. Han, J. W. Lee, J. A. Lee, "Computer Graphics & Synthesizable Synchronous VHDL Code Generator Design and Implemetation from SpecCharts," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 7, no. 11, pp. 3566-3575, 2000. DOI: 10.3745/KIPSTE.2000.7.11.3566.

[ACM Style]

Seong Jo Yun, Won Young Yoo, Jin Young Choi, Jeong Il Choi, Sang Yong Han, Joon Whoan Lee, and Jeong A Lee. 2000. Computer Graphics & Synthesizable Synchronous VHDL Code Generator Design and Implemetation from SpecCharts. The Transactions of the Korea Information Processing Society (1994 ~ 2000), 7, 11, (2000), 3566-3575. DOI: 10.3745/KIPSTE.2000.7.11.3566.

Forms

Search
(IN TITLE, AUTHOR, ABSTRACT,KEYWORDS)

Advanced Search ▼

POPULAR KEYWORDS
(TOP 10 KEYWORDS)

Recent Publications
(LAST 3 YEARS)

Old Journals

Indexing

All publications of TKIPS is indexed in DOI, EBSCO, Google Scholar, Crossref, and CrossCheck.

TKIPS is also selected as the Journal for Accreditation by NRF (National Research Foundation of Korea).

Related Journals