A Multithreaded Architecture for the Efficient Execution of Vector Computations 


Vol. 2,  No. 6, pp. 974-984, Nov.  1995
10.3745/KIPSTE.1995.2.6.974


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  Abstract

This paper presents a design of a high performance MUVEC (MULtithreaded architecture for the VEctor Computations), as a building block of massively parallel processing systems. The MULVEC comes from the synthesis of the dataflow model and the extant super scalar RISC microprocessor. The MULVEC reduces, using status fields, the number of synchronizations in the case of repeated vector computations within the same thread segment, and also reduces the amount of the context switching, network traffic, etc. After benchmark programs are simulated on the SPARC station 20(super scalar RISC microprocessor), the performance(execution time of programs and the utilization of processors) of MULVEC and the performance(execution time of a program) of *T according the different numbers of node are analyzed. We observed that the execution time of the program in MULVEC is faster than that in *T about 1-2 times according the number of nodes and the number of the repetitions of the loop.

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[IEEE Style]

Y. S. Dae and C. K. Dong, "A Multithreaded Architecture for the Efficient Execution of Vector Computations," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 2, no. 6, pp. 974-984, 1995. DOI: 10.3745/KIPSTE.1995.2.6.974.

[ACM Style]

Youn Sung Dae and Chung Ki Dong. 1995. A Multithreaded Architecture for the Efficient Execution of Vector Computations. The Transactions of the Korea Information Processing Society (1994 ~ 2000), 2, 6, (1995), 974-984. DOI: 10.3745/KIPSTE.1995.2.6.974.

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