Automated Synthesis of Time - Stationary Controllers for Pipelined Data Path of Application Specific Integrated Circuits 


Vol. 4,  No. 8, pp. 2152-2162, Aug.  1997
10.3745/KIPSTE.1997.4.8.2152


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  Abstract

We developed an approach to automatically synthesize time-stationary controllers for a given pipelined data path of Application Specific Integrated Circuits (ASICs). This work consists of automated production of control specifications and Finite State Machine (FSM) Optimization. A FSM controller is implemented by performing horizontal partitioning so as to minimize the total controller area. We compared our approach to published work on FSM generation and optimization, and the results indicate large savings in total controller area.

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[IEEE Style]

K. J. Tae, "Automated Synthesis of Time - Stationary Controllers for Pipelined Data Path of Application Specific Integrated Circuits," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 4, no. 8, pp. 2152-2162, 1997. DOI: 10.3745/KIPSTE.1997.4.8.2152.

[ACM Style]

Kim Jong Tae. 1997. Automated Synthesis of Time - Stationary Controllers for Pipelined Data Path of Application Specific Integrated Circuits. The Transactions of the Korea Information Processing Society (1994 ~ 2000), 4, 8, (1997), 2152-2162. DOI: 10.3745/KIPSTE.1997.4.8.2152.

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