Scheduling Performance Analysis of SMP-based RTEMS 


Vol. 14,  No. 9, pp. 725-731, Sep.  2025
https://doi.org/10.3745/TKIPS.2025.14.9.725


  Abstract

With the proliferation of multi-core embedded systems, the SMP scheduling policy of real-time operating systems significantly impacts system performance. In high-reliability environments such as aerospace and defense, it is essential to optimize scheduling configurations under limited hardware resources. While previous studies have discussed the general characteristics of Global and Partitioned Queues, detailed performance comparisons remain insufficient. This study simulates the GR740 architecture using SIS and compares the performance of the two scheduling approaches in the RTEMS environment. The experimental setup uses a 4-core SMP architecture, where the operating system recognizes each core as an independent CPU for scheduling. The results show that for cache-friendly tasks, the Partitioned Queue demonstrates superior performance due to better cache locality, whereas for CPU-bound tasks that require load balancing, the Global Queue performs better. These findings can serve as a guideline for selecting appropriate scheduling strategies in SMP-based RTEMS systems according to application requirements.

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  Cite this article

[IEEE Style]

J. H. Soo, P. J. Yong, K. H. Ho, J. J. Hyouk, J. J. Man, "Scheduling Performance Analysis of SMP-based RTEMS," The Transactions of the Korea Information Processing Society, vol. 14, no. 9, pp. 725-731, 2025. DOI: https://doi.org/10.3745/TKIPS.2025.14.9.725.

[ACM Style]

Jeon Hyeon Soo, Park Jun Yong, Kim Hyeong Ho, Jang Joon Hyouk, and Jung Jin Man. 2025. Scheduling Performance Analysis of SMP-based RTEMS. The Transactions of the Korea Information Processing Society, 14, 9, (2025), 725-731. DOI: https://doi.org/10.3745/TKIPS.2025.14.9.725.

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